Comma: A communications methodology for dynamic module-based reconfiguration of FPGAs.”, ARCS Workshops

On-going improvements in the scaling of FPGA device sizes and time-to-market pressures motivate the adoption of a module-oriented design flow for the development of applications. At the same time, economic factors encourage the reuse of smaller devices for high performance computational tasks. Like other researchers, we therefore envisage a need for dynamic reconfiguration of FPGAs at the module level. However, proposals to date have not focussed on communications issues, have advocated use of specific protocols, cannot be readily implemented, and/or do not support current device architectures. This paper proposes a methodology for the rapid deployment of a communications infrastructure that efficiently supports the communications needs of a collection of dynamic modules when these are known at design time. The methodology also provides a degree of flexibility to allow a range of unknown communication requirements to be met at run time. Our aim is to support new tiled dynamically reconfigurable architectures such as Virtex-4, as well as mature device families. We assess a prototype of the communications infrastructure and outline opportunities for automating the design flow. Page 3 of 1